Friday, October 19, 2007

Ubuntu 8.04 LTS - party weekend

I'm sure this is completely co-incidental *cough*, but considering Ubuntu 8.04 LTS is scheduled for release on April 24th, can we expect some software-freedom partying to coincide with our Freedom Day partying?

April 27th 2008 is a Sunday, so Monday the 28th is a non-titled Public Holiday! A long weekend!

Wednesday, October 17, 2007

Government envelopes (v)

South African Communications Minister Ivy Matsepe-Casaburri told FMTech that she is hopeful that InfraCo and SEACOM will be incorporated into the new Nepad cable project.
[thanks FMTech]
It's amusing (and simultaneously heartbreaking) to see the Department of Communications making their bid to control all of South Africa's external communication networks.

However, the framing of the statement indicates that Neotel has the go-ahead with SEACOM, else why would they want this project folded into the NBIN?

Stephenson <=> Protagonist

So I installed the Six Degrees Facebook app, and while browsing famous and/or interesting people I found that Neal Stephenson is friends with... Hiro Protagonist.


Talk about life imitating art. Or is that life intimating art?

Monday, October 15, 2007

Sun's not very contrarian thinking

Since Sun seems to be treating the launch of their new T5x20 servers as the second coming (and it is, of Niagara, that is), why haven't they done the logical thing and proposed a Niagara/ClearSpeed combo?

Various reasons indicating such a combination would be in demand include:
  1. Power usage
    Since the ClearSpeed boards have approximate power consumption of 25-33 Watts (depending on model), adding two of the PCIe-8x boards to a a T5220 would only increase power usage by 66W with an aggregate 133 GFLOPS increase in computing power. Sun obviously believes stuffing ClearSpeed boards into their servers are a valid play: TIT's Tokyo Tech's TSUBAME cluster achieved a 24% speedup for a 1% increase in power usage.

  2. Floating Point performance
    Real World Tech's excellent article posits that the floating-point ratio in the instruction mix on the first Niagara iteration could exceed no more than 1%-3%. Clearly, the demand for floating point was sufficient to increase the resources dedicated to it from 1 FP unit per chip, up to 1 FP unit per core. Presumably further FP acceleration would be even more beneficial.
Of course, Sun might have more than a little trouble with the integration. Perhaps they might have more luck hooking up some ClearSpeed X620s into a Thumper...